Future technological advancements in integrated electronics will require development of flexible custom fabrication technology for custom VLSI systems. Present semiconductor wafer processing is based on batch processing technology, i.e., the processing of a plurality of wafers in a given furnace through a single process step, after which the wafers are moved to a different furnace which is dedicated to a different process step.
Low temperatures and short processing times are essential requirements of future VLSI processing. This is especially true with the tremendous growth in the business of producing application specific integrated circuits (ASIC) which by definition are produced in limited quantities, and on which the customer demands rapid turn-around. Reproducible growth of the thin film dielectrics necessary to VLSI devices is difficult in the hot wall furnaces commonly used today due to the long ambient and temperature transient times and constant furnace temperatures. A further difficulty with known furnaces is that it is highly desirable to be able to continuously monitor wafer processing; however, since most standard furnaces are designed to be efficient only for multiwafer processing, extensive in situ real time measurements are difficult to perform.
A related problem in the semiconductor wafer processing field is the need to develop a reliable process for in situ fabrication of tungsten gate MOS devices. The fabrication of such devices requires the growth of a gate dielectric by rapid thermal oxidation (RTO) and rapid thermal nitridation (RTN) cycles followed by a non-selective tungsten deposition to form the gate electrode. Rapid thermal oxidation and nitridation (RTO and RTN) of silicon in oxygen and ammonia ambients has already been recognized as an attractive technique for the growth of silicon nitride, silicon dioxide, nitrided oxides, oxidized nitrides, and application specific (custom tailored) insulators. Tungsten is known to be quite attractive as an MOS gate material, as disclosed by S. Iwata, et al., "A New Tungsten Gate Process for VLSI Application," IEEE Transactions on Electron Devices. Vol. ED-31, No. 9, pp. 1174-1179, 1984. However, a reliable process for in situ formation of tungsten gate electrodes has not been developed. Recently, blanket tungsten films were reported to be deposited on silicon dioxide SiO.sub.2 films at substrate temperatures below 450.degree. C. by photo enhanced and microwave plasma enhanced hydrogen plasma chemical vapor deposition (CVD) techniques. See S. Tsuzuku, et al., "Blanket Tungsten Film Formation by Photo Enhanced and Plasma Enhanced Chemical Vapor Deposition," Electrochemical Society Fall Meeting, ECS Vol. 86-2, p. 500, 1986. However, the reproducibility of this process in a commercial environment has not been demonstrated. Moreover, it is not apparent that this process will overcome the classic problems with formation of tungsten gate MOS VLSI devices, i.e., the poor adhesion of tungsten to insulating layers, channeling of implanted dopants through the tungsten gate, lack of oxidation resistance, and gate dielectric degradation.
Among other growth and deposition processes for the formation of VLSI devices, low pressure chemical vapor deposition (LPCVD) of tungsten has emerged as a viable technology for the formation of MOS gate electrodes, low resistivity contacts and contact barriers, multilevel interconnections, and reduction of source/drain parasitic resistance. See Kobayashi, et al., "Non-Selective Tungsten CVD Technology for Gate Electrodes and Interconnection," Proceedings Third Int'l. IEEE VLSI Multilevel Interconnection Conference, pp. 436-442, 1986. However, conventional hot wall LPCVD furnaces are not appropriate for reproducible high rate tungsten deposition and nonselective formation of tungsten on insulators. Present hot wall furnaces suffer from depositing of tungsten on the walls of the furnace, reducing the efficiency of the furnace and eventually requiring disassembly of the furnace for cleaning.
Tungsten gate electrode fabrication by known sputtering techniques requires very pure targets to minimize mobile ion contamination and special effort is needed to reduce sputtering-induced gate damage. Tungsten deposition has also been tried using conventional LPCVD furnaces, operating at temperatures below 400.degree. C. The processes implemented have included silicon reduction of WF.sub.6, which is a selective, self-limiting deposition process; hydrogen reduction of WF.sub.6 which is a selective process; blanket deposition of tungsten in WF.sub.6 +H.sub.2 +SiH.sub.4, which is accomplished with an injection of silane for the gate electrode formation; and, silicon or hydrogen reduction of WCl.sub.6, resulting in non-selective deposition at high temperatures. None of these processes have proven to be capable of reliably defining tungsten gate electrodes in small geometry devices.